The present invention relates to an automatic adjuster for an image capture circuit and specifically to a technique for adjusting the phase or duty of a pulse for the purpose of image capture with an additional reference signal generator on an image capture element.
Digital cameras (digital still cameras, digital video cameras, camera phones, etc.) convert an analog image capture signal captured by an image capture element, for example, CCD (Charge Coupled Device) or MOS (Metal Oxide Semiconductor) sensor, to a digital image capture signal, which is then subjected to predetermined processes before it is stored. To capture an image of an object using an image capture element, a pulse for driving the image capture element, a pulse for detecting a signal level, and the like, are necessary. The phase and duty (timing) of these pulses are difficult to adjust in the stage of hardware designing because of variations caused by manufacture. Hence, in common procedure for timing adjustment, an engineer carries out a timing adjustment after manufacture and stores information representing the adjusted timing in a memory region.
According to the first conventional technique disclosed in Japanese Laid-Open Patent Publication No. 2005-151081, an image is captured within a minimum exposure time, and the phases of pulses supplied to a CDS (Correlated Double Sampling) circuit, in particular, the phase of a pulse used for sampling the feed-through level and the phase of a pulse used for sampling the level of a photoelectrically-converted image capture signal, are adjusted such that noise components, i.e., high-frequency components, are minimized. Also, the phase of a clock pulse used for A/D (Analog/Digital) conversion is adjusted in the same way at the stage subsequent to the CDS circuit.
According to the second conventional technique disclosed in Japanese Laid-Open Patent Publication No. H5-37850, a test signal generator circuit for generating a test signal in synchronization with a horizontal transfer control pulse is provided at the stage immediately before an analog circuit (including CDS circuit) which processes an output signal of an image capture element, such that the test signal is processed via the same signal route as that employed in normal mode. In the test mode, the test signal is superposed on part of the output of the CCD with stopped vertical transfer which corresponds to the image capture signal level, and the phase of the test signal supplied to an image processor is shifted by adjusting at least one of the phase of the horizontal transfer control pulse and the phase of the sampling pulse of the CDS circuit such that the sampling timing at a video camera section and the timing of A/D conversion at the image processor coincide with each other, whereby the phase of the clock pulse used for A/D conversion is adjusted.
In recent years, especially in the fields of medical cameras, replacement of an image capture element after manufacture of a digital camera has been more probable. Using a different image capture element naturally requires a pulse of different timing for driving the element, and hence, readjustment of timing. However, readjustment of timing by an engineer increases the difficulty in achieving simple replacement of the image capture element.
The above-described first conventional technique offers relatively low accuracy because the same method is applied to all of a plurality of pulses to be adjusted in determining the optimum phase with no consideration to the characteristics of the pulses.
The above-described second conventional technique cannot achieve optimization of driving timings necessary for different image capture elements because the test signal generator circuit for the timing adjustment is provided outside the image capture element.